• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A management device (1) for triggering causes in an electronic trigger for operating in an efficient and reliable manner through an architecture of three microcontrollers. The first microcontroller (3), the second microcontroller (4) and the third microcontroller (5) being connected, analyze and save typical characteristics to the electrical network (2) measured by the first microcontroller (3). Depending on the power situations and the events analyzed, one, two or three microcontrollers may be active to reduce the need for electrical energy of the device (1). The backup of the information relating to the electrical network (2) is performed, at least in part, in a redundant manner.
    公开号:FR3018961A1
    申请号:FR1400710
    申请日:2014-03-24
    公开日:2015-09-25
    发明作者:Bertrand Masseboeuf；Joel Sorin
    申请人:Schneider Electric Industries SAS；
    IPC主号:
    专利说明:

    [0001] TECHNICAL FIELD OF THE INVENTION The invention relates to a triggering causes management device in a circuit breaker. State of the art After triggering an electronic circuit breaker, it is important to keep the information concerning the cause of the trip. It is also important to keep some information about the events that occurred just before the outbreak.
    [0002] In a traditional way, the information relating to the cause of the trip is done by means of a microprocessor which saves this information on memory devices. The microprocessor also intervenes in the backup of the information concerning the electrical quantities before and at the moment of the triggering. The microprocessor is highly stressed during the information storage which requires the use of a large microprocessor. There are several documents that address this problem. For example, EP0279692 discloses a circuit interrupter with a fault indicator. The information from the monitored power state just before the fault is backed up by a single microprocessor. For the sake of simplicity, the circuit breaker is powered directly by the line to be monitored. In this configuration, when tripping occurs, the circuit breaker is no longer powered.
    [0003] Document US5089928 discloses a circuit breaker, using a microcomputer for monitoring a circuit and for backing up data relating to the monitored circuit.
    [0004] Document US5311392 discloses a circuit breaker, equipped with two processors for monitoring a power supply circuit. The processors are powered independently, so that a second processor also works when the power to the first processor is cut off. The first processor has access to more information than the second processor. Document US5224011 discloses a system, where a battery is used to safeguard the information in an electrical circuit, in case of loss of main power. OBJECT OF THE INVENTION It is found that there is a need to provide a circuit breaker providing information on the causes of tripping more efficiently and reliably. This object is achieved by a circuit breaker comprising: a series of inputs intended to be connected to a first microcontroller configured to measure characteristics of an electric current of a supply line to detect an electrical fault of the supply line a second microcontroller powered by said power line and having a first power consumption value, the second microcontroller being configured to analyze data from the first microcontroller to detect an electrical fault of the power line, a third powered microcontroller. by said power supply line and connected to receive data from the first and second microcontrollers, the third microcontroller being configured to signal the cause of tripping of the circuit breaker, the third microcontroller having a second power consumption value lower than the first power consumption value, a secondary power source configured to power the third microcontroller in case of unavailability of the power line. BRIEF DESCRIPTION OF THE DRAWINGS Other advantages and features will emerge more clearly from the following description of particular embodiments of the invention given by way of nonlimiting example and represented in the accompanying drawings, in which: FIG. 1A illustrates, schematically, a first embodiment of a circuit breaker, Figure 1B schematically illustrates a second embodiment of a circuit breaker, Figure 2 illustrates a flowchart with the main actions taken by the circuit breaker, Figures 3A and 3B represent schematically, two embodiments of a circuit breaker, FIG. 4 represents a flowchart of the steps for the management of the state of the battery, FIG. 5 represents the instants and the cycles setting the evolution of the current emitted by the battery as part of a method of managing the discharge of the battery, - Figure 6 shows examples of the evolution of time measurement of the measured voltage across the battery terminals. DETAILED DESCRIPTION FIGS. 1A and 1B show a device 1 for monitoring the supply lines of an electrical network 2. Advantageously, the monitoring device 1 is part of a circuit breaker connected to one or more supply lines. 2. The monitoring device analyzes these lines to determine if the operation is normal or faulty. The circuit breaker is configured to analyze the electrical characteristics of the power line to be monitored by means of microcontrollers and to trip the power supply line if an electrical fault is detected. The device 1 may comprise a first microcontroller 3, a second microcontroller 4 and a third microcontroller 5 whose specificities will be defined later. In a variant, the first microcontroller 5 is arranged outside the monitoring device 1 but it is coupled to an input series of the device 1 so as to provide it with information on electrical quantities representative of the electrical network 2. The first microcontroller 3 is connected to the supply line of the electrical network 2. The first microcontroller 3 is equipped with measuring means 6 for measuring quantities characteristic of the electrical network 2 (step F1), such as for example the voltage V, the current I and the frequency f. The first microcontroller 3 can be integrated in the circuit breaker or remote out of the circuit breaker. The first microcontroller 3 is also configured to monitor the electrical network 2 and detect a possible defect. In an advantageous embodiment, the first microcontroller 3 is electrically powered by a primary power supply 7 which comes from the electrical line to be monitored. This primary power supply 7 is the main source of electrical energy of the first microcontroller 3. As the power supply of the circuit breaker and more particularly of the monitoring device 1 is carried out by the electrical network 2 or is derived from this network 2, in case of tripping of the circuit breaker the primary power line is cut off and the first microcontroller 3 is no longer powered. Moreover, the power delivered by the primary power supply 7 can vary according to the electrical load connected to the electrical network. A secondary power source is provided by a first electrical capacitance 8, to power the first microcontroller 3 for a limited time, when its primary power supply 7 is interrupted. In this way, when the trip command is sent to the circuit breaker or when the first microcontroller 3 detects the loss of the primary power supply, there is enough energy in the capacitor 8 to ensure the transfer of the relevant information to the other components of the circuit. breaker. This secondary power supply 8 ensures the recording of important electrical data during the detection of a possible electrical fault of the supply line. The first microcontroller 3 can detect a fault in the electrical network and trigger a power failure. Information relating to the electrical network 2 and more particularly to the monitored line are communicated to different circuit breaker members via a first communication line 9 from the first microcontroller 3. In a particular embodiment, illustrated in FIGS. 1A and 1B, a second microcontroller 4 is connected to the first microcontroller 3 by means of the first communication line 9. In this way, the second microcontroller 4 receives information relating to the electrical network 2 by the first microcontroller 3. The second microcontroller 4 can also receive information relating to the electrical network 2 from other devices of the monitoring device. These other devices provide measurements of the electrical magnitudes of the electrical network. The second microcontroller 4 has the main function of analyzing and saving the information relating to the electrical network 2. The second microcontroller 4 performs a more in-depth analysis of the measured electrical quantities, which enables a more detailed study of the electrical network (step F2 ). In this configuration, the second microcontroller 4 may request a cut-off of the supply network for problems not detected by the first microcontroller 3, for example a drop in voltage below a threshold and / or an abnormal change in the frequency. The second microcontroller 4 is also configured to perform more precise analyzes of the electrical characteristics of the line to be monitored, for example a voltage, frequency and / or harmonic measurement and to transmit this information to the user and / or to other calculation modules.
    [0005] For a thorough analysis of the information relating to the electrical network 2, the second microcontroller 4 needs a large amount of electrical energy. This energy can also be used to transmit the collected information to other computing modules or to the user. For its power supply, the second microcontroller 4 is connected to the primary power supply 7. Advantageously, the second microcontroller 4 is powered by means of a DC / DC power supply that is itself powered by the primary power supply 7. As above in the event of a fault in the electrical network or if the primary power supply 7 can not supply the power required, the second microcontroller 4 is not able to operate.
    [0006] A second secondary electrical source is provided by a second capacitor 8 ', for supplying the second microcontroller 4 for a limited time, when its primary power supply 7 is interrupted. In this way, when the circuit breaker tripping command is sent or when the second microcontroller 4 detects the loss of the primary power supply, there is enough energy in the capacitor 8 'to transfer the relevant information to the other circuit breaker members. .
    [0007] The second microcontroller 4 is connected to a memory 10. The memory 10 is advantageously powered by means of the primary power supply 7. In the event of failure of the primary power supply 7, it is advantageous to connect the memory 10 to a source of power. secondary power supply which is formed by a capacitor 11 to provide electric power for a limited time.
    [0008] In this way, the data calculated by the second microcontroller 4 can be stored in the memory 10. The memory 10 is advantageously permanent electrically erasable and programmable memory type or else permanent magnetic storage type memory or other which allows to easily write the information and keep it even after no power supply. A user can then read the recorded data. The transfer of information between the second microcontroller 4 and the memory 10 is performed by means of a second communication line 12.
    [0009] Typically, the data saved are derived from the analysis of the information relating to the electrical network 2. For example, the data relate to a time evolution and / or point values of the current I, the voltage V or the frequency f of a alternating current, present in the electrical network 2.30 Advantageously, the second microcontroller 4 is configured to perform harmonic calculations which requires the execution of energy-intensive Fourier transform calculations.
    [0010] A third microcontroller 5 is present and connected to the second microcontroller 4 according to a protocol allowing data transfer in both directions. For its power supply, the third microcontroller 5 is connected to the primary power supply 7. Advantageously, the third microcontroller 5 is connected to the same power supply as the second microcontroller 4, for example by means of the DC / DC converter. Advantageously, the third microcontroller 5 is associated with a secondary power supply 13, which is a source independent of the electrical network 2. For example, this energy source may be a battery 13. The battery 13 is an electrochemical device which converts chemical energy into electrical energy through a chemical oxidation-reduction reaction. The battery 13 may be non-rechargeable and carry the name of battery or electric battery. The battery is advantageous compared to a capacitor because it is more easily replaceable in case of failure.
    [0011] In case of unavailability of the primary power supply 7, the third microcontroller 5 is powered by the battery 13. The battery 13 is configured with the third microcontroller 5 so that the third microcontroller 5 is powered longer than the first and second microcontrollers in case of unavailability of the primary power supply. Preferably, the battery 13 is configured with the third microcontroller 5 to provide a permanent supply of the third microcontroller 5. By permanent power supply, it is intended to supply the third microcontroller 5 with a duration that is clearly greater than the duration of a maintenance intervention. maintenance so that primary power is restored before the battery runs out. To obtain such a result, the third microcontroller 5 has reduced functionality and low energy consumption. The third microcontroller 5 has information presentation functionalities calculated in the first and / or second microcontrollers. The third microcontroller 5 has a power consumption which is lower than the power consumption of the second microcontroller 4. For example, the third microcontroller 5 is devoid of means for calculating Fourier transforms. As a result, the second microcontroller has a higher power consumption than the power consumption of the third microcontroller. Such a configuration makes it possible to dedicate the second microcontroller 4 to very energy consuming operations in order to perform a fine analysis of the electrical network on the basis of the information provided by the first microcontroller 3 and / or by other devices providing measurements of electrical quantities. of the electrical network 2 and also advantageously to ensure the transmission of all or part of this information to the user or other organs of the circuit breaker.
    [0012] The third microcontroller 5 is dedicated to communication operations information on triggering causes including with the user which requires less energy. Advantageously, the third microcontroller ensures the display of triggering causes. After the tripping of the circuit breaker, it is no longer necessary to analyze the mains power that is cut, but it is important to know the reasons that caused the tripping and therefore the interruption of the power supply by the network. It is therefore not necessary to maintain the operation of the second microcontroller 4 and on the contrary it is important to supply the third microcontroller 5 to collect and make available the available information.
    [0013] The dissociation of the functionalities between two microcontrollers having different electrical consumptions makes it possible to perform all the functions expected when the primary power supply is present and to ensure the supply of the relevant information after interruption over a period of time that can be long. This feature also provides a compact and robust device because it is no longer necessary to provide a secondary power supply that supplies all the components of the circuit breaker. The capacitors 8 and 8 'provide, for a short period of time, powering the first and second microcontrollers 3 and 4 so as to record the electrical characteristics of the network before and just after the cut. This information is stored in the memory 10. Since the memory 10 is also powered by a secondary power source 11 of the capacitor type, the third microcontroller 5 is able to retrieve this information. As the microcontrollers are powered by the primary power supply 7, it is possible that the latter can not deliver a power necessary for the proper functioning of the second microcontroller 4. This case may occur when the power line is lightly charged or if a defect of earth occurs. If a fault is detected by the first microcontroller 3, the latter prevents the third microcontroller 5 and the information is recorded without the second microcontroller 4 intervenes in the case where a direct communication line exists between the first microcontroller 3 and the third. Microcontroller 5. Advantageously, the third microcontroller 5 has first analysis means 14 configured to analyze characteristics of the electrical network and advantageously to analyze high currents I and high voltages V of the electrical network 2. These data are easily computable and the Calculations are little energy consumers. The third microcontroller 5 may optionally be used to detect an anomaly in the electrical network (step F3). Advantageously, the second microcontroller 4 has, for its part, second analysis means 15 configured to analyze only weak or strong currents I and high voltages V which are present on the electrical network 2. Preferably, the analyzes carried out by the second microcontroller 4 come from data provided by the first microcontroller 3 or other devices that provide measurements on the electrical magnitudes of the electrical network 2. In this case, there is no risk of triggering for overvoltage and the Third microcontroller 5 may also be configured to perform appropriate network analysis. This configuration makes it possible to have a circuit breaker which is functional over a larger range of current I.
    [0014] In order to facilitate the recovery of the data in the third microcontroller 5, various information is advantageously sent from the second microcontroller 4. The second microcontroller 4 sends information about its own presence via a synchronization signal. Thus, if the second microcontroller 4 is no longer powered, the third microcontroller 5 detects this state by a lack of synchronization signal. The second microcontroller 4 also sends a signal indicating that the cut-off order of the electrical network has been initialized in order to facilitate the recovery of the electrical data (step F5) by initiating the data recovery at the earliest. In a particular embodiment, illustrated in FIG. 1A, at least two communication lines are used. A first communication line 9 is used between the three microcontrollers 3, 4 and 5 advantageously for the transfer of information relating to the electrical network 2. Two branches are mounted in shunt so that the microprocessors 4 and 5 receive the same data. A synchronization line 16 connecting the second microcontroller 4 and the third microcontroller 5 also allows an exchange of information. The synchronization line 16 makes it possible to define the microcontroller in charge of reading the information. Advantageously, as long as the second microcontroller 4 is powered, it reads and analyzes priority or exclusively the information provided by the first microcontroller 3. The third microcontroller 5 can remain in standby or even standby because there is no triggering of the breaker. An indication line 17 makes it possible to indicate the cut-off of the network and the cause detected by the second microcontroller 4 (steps F5 and F6) by a specific signal. In another particular configuration illustrated in FIG. 1B, at least two distinct communication lines are used. A first communication line 9 is used for the transfer of the information relating to the electrical network 2 between the first microcontroller 3 and the second microcontroller 4. A second communication line 9 'is used for the transfer of the information relating to the electrical network 2 between the second microcontroller 4 and the third microcontroller 5. A synchronization line 16 connecting the second microcontroller 4 and the third microcontroller 5 also allows an exchange of information. The synchronization line 16 makes it possible to define the microcontroller in charge of reading the information as for the previous embodiment. Advantageously, as long as the second microcontroller 4 is powered, it reads and analyzes the information provided by the first microcontroller 3. The third microcontroller 5 remains in standby or even standby because there is no tripping of the circuit breaker. The indication line 17 makes it possible to indicate the cut-off of the network and the cause detected by the second microcontroller 4 (steps F5 and F6) by a specific signal. In the two particular cases of embodiment illustrated in FIGS. 1A and 1B, the line of indication 17 allows the second microcontroller 4 to communicate to the third microcontroller 5, for example information from its analysis of the electrical network 2. In this way, the third microcontroller 5 is not obliged to continuously analyze the information relative to the electrical network 2, received by the communication line 9 or 9 '. Advantageously, the third microcontroller 5 has a standby mode, in which it does not consume electrical energy. Thus, the monitoring device 1 makes it possible to operate in a more efficient manner in terms of electrical energy. The standby mode is exited by the third microcontroller 5 when it receives, for example a start signal from the first microcontroller 3, or the second microcontroller 4. For example upon receipt of a signal indicating the tripping of the circuit breaker, the third microcontroller 5 will retrieve information from the memories (for example the memory 10) that are supplied by the first and / or second microcontrollers (step F7 and F8). Also advantageously, the third microcontroller 5 is configured to exit the standby state failing to receive a synchronization signal. Thus, if the power delivered by the main source is insufficient information can be stored in the memories 10 and 19 even if the second microcontroller 4 is inactive.
    [0015] In an advantageous embodiment illustrated in FIG. 1A, the first microcontroller 3 is connected to the second and third microcontrollers 4 and 5 by means of two bypass connections of the line 9. In this way, the two microcontrollers 4 and 5 receive the same information from the first microcontroller 3.30 Even more advantageously and illustrated in Figure 1A, the transfer of information is achieved through a buffer memory 18. A first buffer memory 18a provides the connection between the first microcontroller 3 and the second microcontroller 4 and a second buffer memory 18b make the connection between the first microcontroller 3 and the third microcontroller 5. There is therefore a first communication line provided with a buffer memory 18a and which connects the first microcontroller 3 with the second microcontroller 4. There is also a second line of communication with a buffer memory 18b which connects the first microcontroller 3 with the third microcontroller 5. In an advantageous embodiment illustrated in FIG. 1B, the first microcontroller 3 is connected to the second microcontroller 4 and then the second microcontroller 4 is connected to the third microcontroller 5 by means of two separate connections denoted respectively 9 and 9 '. In this way, the microcontroller 5 receives the information from the first microcontroller 3 via the second microcontroller 4. Even more advantageously and illustrated in FIG. 1B, the transfer of the information is carried out via a buffer 18. A first buffer 18a provides the connection between the first microcontroller 3 and the second microcontroller 4 and a second buffer memory 18b connects the second microcontroller 4 and the third microcontroller 5. There is therefore a first communication line provided with a buffer memory 18a and it connects the first microcontroller 3 with the third microcontroller 5. There is also a second communication line provided with a buffer memory 18b and which connects the second microcontroller 4 with the third microcontroller 5.
    [0016] Advantageously in the embodiments illustrated in FIGS. 1A and 1B, the second microcontroller 4 sends a synchronization signal to the third microcontroller 5 to define the read priority on the buffer memories 18, 18 '. Also advantageously, the first microcontroller 3 is connected to the other two microcontrollers 4 and 5 by means of one of the communication lines 9 and 9 'serving to indicate the transmission of a fault in the electrical network which results in a cut-off request (steps F4 and F5). The use of one of these lines of communication makes it possible to secure the recording of the information on the causes of the cut.
    [0017] In a particular embodiment illustrated in FIGS. 1A and 1B, the third microcontroller 5 is connected to a second memory 19 in order to be able to store the information of the microcontroller 5. In this way, part of the information is recorded twice. There is redundancy between the memories 10 and 19 which makes it easier to find information in case of a problem affecting the integrity of the circuit breaker. Advantageously, if the third microcontroller 5 detects that the memory 10 is no longer supplied, it stores the information in another memory, for example the internal memory of the microcontroller 5, however the latter is a volatile memory. It is also possible to store this information in the memory 19. In a preferred embodiment, the first second and third microcontrollers do not directly exchange data. The data exchanges are carried out by means of memories which are common to two microcontrollers, for example the memory 10 and / or the memory 19 or by means of parallel communication lines each provided with a memory, for example the buffer memories 18 of line 9 and / or line 9 '.
    [0018] The configuration illustrated in FIG. 1A advantageously makes it possible not to use the third microcontroller 5 which can then be in a standby mode for a large part of the operating time of the circuit breaker 1.
    [0019] Transmission means 20 are preferably connected to the second memory 19 and / or the memory 10, to achieve easier transmission of the recorded data. The user can receive and read the information relating to the electrical network 2 without using the third microcontroller 5 which limits the energy consumed. By way of example, the transmission means 20 transmit information relating to the electrical network 2 by a near-field communication, or by another communication based on electromagnetic waves. It is advantageous to couple the third microcontroller 5 with one or more signaling devices (step F9) in order to facilitate the reading of the causes that caused the tripping of the circuit breaker. The third microcontroller 5 has a signaling output 21 which is configured to signal to the user information derived from the information relating to the electrical network 2. For example, this signaling can be done, for example, by light-emitting diodes which are connected to the signaling output 21. Thus, in case of tripping, the user quickly knows if the trip of the circuit breaker is related to a problem of overload, overcurrent, earth leakage, overvoltage or other incident this which allows to quickly orient the user on finding the causes of the incident. Advantageously, the circuit breaker comprises a clock 22 which makes it possible to date the different events occurring. For example, the record is associated with a date to determine the chronological evolution of the different electrical parameters relative to each other.
    [0020] In one embodiment, the first microcontroller 3 is a microcontroller of the "Application-Specific Integrated Circuit" type which continuously measures the current I and the voltage V of the electrical network 2. When it detects a fault in the electrical network 2 , it signals it to the second microcontroller 4 and the third microcontroller 5, and triggers the interruption of the current present in the electrical network 2. The operation of the monitoring device 1 can be guaranteed in two operating situations. In the first operating situation, the electrical network 2 circulates a lot of electrical energy, for example a current of the order or greater than 25% of the rated current of the circuit breaker, which is reflected for the circuit breaker 1 by the monitoring of large values for the current I and / or for the voltage V. In this situation, the primary power supply is sufficient to supply all the members of the management device 1. In this case, the second microcontroller 4 is capable of analyzing the information relative to the electrical network 2 and it permanently stores information relating to the network 2 in the memory 10 and can consult the information stored in the memory 10. The third microcontroller 5 can be in a standby mode, because the second microcontroller 4 ensures 2. In this operating situation, when the first microcontroller 3 detects a defect. aut in the network 2, it triggers the cutoff of the network 2. The main power supply 7 is also cut off because it is derived from the electrical network 2. With the first capacity 8, the first microcontroller 3 can inform the third microcontroller 5 which is powered by the secondary power supply 13.30 Using the clock 22, the third microcontroller 5 can date the cut initiated by the first microcontroller 3, and save the date in the second memory 19. By means of the second communication line 12, the third microcontroller 5 can read the information relating to the analysis of the electrical network 2 that was written by the second microcontroller 4 in the first memory 10 before occurrence of the fault in the network 2 and during the appearance of the fault in the network. The third microcontroller 5 can transmit all the information to the transmission means 20 which can send them to the user. The third microcontroller 5 can also send a signal corresponding to the cause of the tripping by the signaling output 21 to inform the user, for example with several light-emitting diodes. Thus, all the information relating to the network 2 is transmitted to the user.
    [0021] In a particular operating mode, combinable with the other modes of operation, the clock 22 is shared by the third microcontroller 5, the second microcontroller 4 and the first microcontroller 3. In a variant, each microcontroller can be associated with a specific clock or a clock may be common to two microcontrollers. In the second operating situation, the electrical network 2 circulates a low electric current, for example less than 20% of the rated current of the circuit breaker. Therefore, the primary power supply 7 is not sufficient for the operation of the second microcontroller 4. In this case, the first microcontroller 3 sends the information relating to the electrical network to the third microcontroller 5. If the first microcontroller 3 detects a fault in the electrical network 2, only the third microcontroller 5 can analyze the cause of the fault and save the information relating to the network 2.
    [0022] As indicated above, it is advantageous to have a third microcontroller 5 provided with a standby state in which the consumption is extremely reduced or zero. Since the third microcontroller 5 is not used to analyze the operating conditions of the power line, it is in standby most of the time. Advantageously, the third microcontroller 5 is configured to exit from a standby state on receipt of a signal from the first and / or second microcontrollers indicating the activity of the electrical network 2 or the detection of a defect. electric. Thus, in the normal operation of the circuit breaker for monitoring the network, the third microcontroller 5 is in the standby state and when an activity or an electrical fault is detected the third microcontroller 5 is activated in order to recover the relevant information before the final cutoff. of the other two microcontrollers 3 and 4. In the embodiments illustrated in FIGS. 1A and 1B, the microcontrollers and the memories are fed between the same reference voltage 23 which is here earth and a voltage derived from the primary power supply. As a variant, it is possible to use different reference voltages for each microcontroller and / or for each memory. In an advantageous embodiment, it is possible to activate the third microcontroller 5 periodically or on the order of the user to perform one or more other functions. In a particularly advantageous embodiment, the monitoring device 1 comprises a system for managing the discharge of the battery 13. In fact, it has been discovered that in certain cases, when the circuit breaker is actuated, the battery does not is more powerful enough to power the third microcontroller 5.
    [0023] The operation described above can be summarized in FIG. 2. The first and second microcontrollers 3 and 4 and possibly the third microcontroller 5 perform the analysis of the electrical quantities of the electrical network 2 (steps F1, F2 and F3). The electrical network is denoted "primary line" If at least one of the microcontrollers detects an anomaly on the electrical network 2, it sends a signal that is, for a circuit breaker, the order to cut the power supply. The power is cut in a step F4 and so it is the same for the primary power of the circuit breaker. At the same time or consecutive to the cut-off command, information is transmitted by the first microcontroller 3 and / or the second microcontroller 4 towards the third microcontroller 5 in order to warn it of the power failure (step F6 ). As indicated above, the third microcontroller 5 retrieves the relevant information on the electrical network (step F7) from the first and second microcontrollers and / or from the buffers 18 of the communication lines and / or from the memories 10 and 19. The data collected and optionally analyzed are transferred into the memory 10 and possibly into the memory 19 (step F8). In addition to the recording, the device indicates the type of failure that led to the power failure (step F9). As indicated above, in a particularly advantageous embodiment, the monitoring device comprises a device for managing the discharge of the battery 13. In fact, it has been observed that in certain situations, when the circuit breaker tripped, the battery 13 was not able to power the third microcontroller 5. In a standard configuration, the circuit breaker is not made to trigger regularly, and it is rare to use the backup power. It is therefore important that in this exceptional situation, the monitoring device can help the user in the search for the electrical fault. Figure 3a illustrates a monitoring device 1, for example a circuit breaker, configured to monitor one or more power supply lines. The monitoring device 1 is intended to be connected to the power supply lines and configured to measure the electrical characteristics of the lines, for example the voltage present on the line and / or the current flowing in the power line. In the case of a circuit-breaker, the cut-off of the monitored supply line may occur if an anomaly is detected. The monitoring device 1 has a series of power supply terminals for connection to a primary power source 2. The primary power source is the main power source, i.e. feeds mainly or primarily the different components of the monitoring device 1. In order to overcome a deficiency of the primary power source 2, the monitoring device 1 comprises a secondary power source 13 which is formed by a battery. The battery 13 comprises two contacts 13a which connect the battery 13 to the elements of the monitoring device 1. Advantageously, all the electronic circuits or only a part of the electronic circuits of the monitoring device 1 are powered by the battery 13 in order to preserve a significant autonomy in case of disappearance of the main power supply 2. Advantageously, the battery 13 supplies at least one storage circuit 24 which records indicators related to the measured electrical quantities. In the case of a circuit breaker, the storage circuit 24 preferably registers indicators related to the tripping causes of the circuit breaker.
    [0024] The secondary power source 13 is placed in the monitoring device 1 so as to avoid setting up a new series of supply lines dissociated from the first series of supply lines. In this way, it is possible to have a monitoring device 1 which is compact and which ensures a quasi-permanent operation. Since the monitoring device 1 is placed in aggressive environments, it is advantageous to have a secondary power source 13 which is also capable of supporting such conditions.
    [0025] In an advantageous embodiment, the monitoring device 1 is configured so that the primary power source 2 is the power line to be monitored or is connected to the power supply line to be monitored. The power line to be monitored is intended to power one or more other electrical loads. If the monitoring device 1 discovers an anomaly on the power line, it will cause the disconnection of the line which will result in the disappearance of the primary power source 2.
    [0026] Thus, in this configuration, when the power line to be monitored is stopped, the main power supply 2 is missing and it is necessary to switch to the secondary power supply 13. As shown in FIG. 3A, the monitoring device 1 comprises a circuit control circuit represented here by at least the microcontrollers 4 and 5. This control circuit is configured to analyze the power line to monitor. The storage circuit 24 is coupled to the control circuit. In the embodiment illustrated in FIGS. 3A and 3B, the storage circuit 24 is part of the control circuit and advantageously it is part of the third microcontroller 5.
    [0027] The battery 13 is configured to supply the control circuit or a portion of the control circuit (in particular the storage circuit 24) in the event of a fault in the main power supply 2. The battery advantageously supplies the third microcontroller 5, which enables the ensure the good performance of the monitoring device 1. The monitoring device 1 further comprises a management circuit 25 configured to analyze the state of the battery 13 and detect a possible failure of the battery 13.
    [0028] The use of a management circuit 25 which verifies the state of the battery 13 makes it possible to know, over time, whether the secondary supply source 13 is able to supply the storage circuit 24 and advantageously the third microcontroller 5 and thus to ensure proper operation of the monitoring device 1 when the main power is lacking. Measuring means 26 are configured to measure the voltage Vbat across the battery 13. The measuring means 26 are connected to an input of a comparator 27 to provide information relating to the state of the battery 13, the average of the voltage Vbat. The measuring means 26 may be configured to measure the voltage across the battery 13 periodically, a period symbolized by Atm, in FIG. 5, for example by means of the clock 22. It is also possible to measure the battery 13 upon receipt of a measurement signal. The term measured voltage Vbat may represent the voltage across the battery 13 or a magnitude representative of this voltage. In a particular embodiment, the voltage at the terminals of the battery Vbat is measured every 24 hours, that is to say Atm = 24h.30. The comparator 27 is configured to compare the measured voltage Vbat with a first threshold VOFF and at a second threshold Vmin. The second threshold Vmin is greater than the first threshold VOFF.
    [0029] The value of the second threshold Vmin corresponds to a functional battery 13. Thus, if the measured voltage Vbat is greater than the second threshold value Vrnin, the comparator 27 transmits first information representative of this comparison and the battery 13 is considered as functional by the management circuit.
    [0030] The interval between the first threshold value VOFF and the second threshold value Vmin corresponds to a battery 13 possibly having a problem that can be corrected. Thus, if the measured voltage Vbat is within this range, the comparator 27 returns a second associated information to the management circuit. The value of the first threshold VOFF corresponds to a nonrecoverable defective battery 13. Thus, if the measured voltage Vbat is lower than the first threshold value VOFF, the comparator 27 emits a third piece of information representative of this comparison and the battery 13 is considered to be defective. The battery 13 must, for example, be replaced. The information transmitted by the comparator 27 is sent to the management circuit 25. If the management circuit 25 receives the first information, it can store this information in a memory. If the management circuit 25 receives the third information, it can warn the user that the battery 13 is defective and that its replacement is expected to maintain the operation of the monitoring device 1 in all its performance. The signaling of a faulty battery 13 can be achieved by means of a light indicator, for example by means of a light-emitting diode. It is also possible to use an electromagnetic wave or an electronic signal to inform the user of the failure of the battery 13. By way of example, the management circuit 25 indicates the end of life of the battery 13 by means of exit 21 or another dedicated exit. If the management circuit 25 receives the second information, it initiates a test protocol to determine if the battery 13 is functional or defective. The management circuit 25 is coupled to an electrical load 28 configured to discharge the battery 13. Under these conditions, an electric current flows from the battery 13 to the electrical load 28 (through the terminals 13a of the battery 13). Thus, a partial discharge of the battery 13 is triggered when the measured voltage Vbat at the terminals 3a of the battery 13 is greater than the first threshold VoFF and lower than the second threshold Vmin- The discharge of the battery 13 is triggered by the management circuit 25 which defines the conditions of the discharge, for example the intensity of the current, the duration of the current, the quantity of electric charges transferred by the battery 13, the shape of the current in time (intensity as a function of time) and / or the number of repetitions of a discharge current defining a pattern. A discharge current Id is emitted from the battery 13, and the discharge current Id is configured to at least partially eliminate a passivation layer present on a terminal or one of the internal electrodes of the battery 13. for example, the discharge current Id is in the form of several pulses of square shape. In one embodiment, the management circuit 25 is connected to the control electrode of a switch 29. The switch 29 electrically connects the two terminals 13a of the battery 13 or it connects one of the terminals 13a of the battery 13 to a reference potential 23 which is able to discharge the electrical charges. This embodiment is advantageous because it is compact and it makes it possible to easily control the passage of the current from the battery 13. In a still more particular embodiment, the switch 29 is a transistor. The transistor 29 allows a discharge current Id to pass from the anode of the battery 13 to the reference potential 23 through the electric charge 28. The reference potential 23 is for example the ground. The use of a transistor 29 associated with the electric charge 28 allows for an extremely compact device while allowing a good control of the amount of current to be passed. The transistor 29 makes it possible to set the duration of passage of the current and the electric charge 28 makes it possible to fix the intensity of the current. The monitoring device 1 advantageously comprises a counter 30 which is configured to measure a magnitude representative of the passage of the electrons.
    [0031] By way of example, the monitoring device 1 advantageously comprises a counter 30 which is configured to measure the amount of current flowing through the terminals 13a of the battery 13 or to measure the number of current application iterations passing through the terminals 13a. 13. The counter 30 may be a counter which receives information from the management circuit 25 indicating the triggering of a discharge current Id.
    [0032] The counter 30 then records the number of iterations of application of the discharge current Id. The counter 30 can also be a counter measuring the activation of the control electrode of the switch 29. The counter 30 can also be a current measurement device Id flowing through the battery 13. The recorded information is then an amount of electrons having passed through the terminals 13a of the battery 13. In a particular embodiment, the management circuit 25 is connected to the counter 30. The management circuit 25 is configured to signal the failure of the battery 13 if the second information is sent by the comparator 27 and if the counter 30 has a value greater than a critical value Nc. Under these conditions, it has been detected that the voltage Vbat across the battery 13 is in the range where the test protocol is to be applied and the counter 30 indicates that the test protocol has already been applied several times. It therefore seems that the voltage drop is not related to a passivation layer or that the passage of a current across the battery 13 is not sufficient to break the passivation layer. The emission of a failure signal makes it possible to anticipate a worsening of the situation where the battery 13 will no longer be able to supply a sufficient voltage to power the control circuit, the third microcontroller or at least the storage circuit. This configuration makes it possible to more quickly detect a battery 13 which will not be functional and this makes it possible to reactivate certain passivated batteries 13 without the intervention of a user. In a particular embodiment, the measuring circuit 26 is configured to measure the voltage Vbat across the battery 13 as soon as a battery 13 has been installed. Under these conditions, a newly placed battery 13 is automatically detected. This allows the user to know immediately if the new battery 13 inherently has a problem. This avoids the user who has just placed a new battery to return change this battery that is defective. The measuring circuit 26, the comparator 27 and the management circuit 25 may be made by separate electronic circuits or they may be at least partially made in the same electronic circuit, for example the control circuit and in particular by a microcontroller. The use of a microcontroller to form at least a portion of the management circuit 25, the measuring circuit 26, the comparator 27 and / or the counter 30 is advantageous because it allows for a compact device and low energy consumption. In a particular configuration shown in FIG. 3b, the primary power source 2 applies a supply voltage Vdd to the monitoring device 1 via a first diode 31.
    [0033] This configuration is particularly advantageous when the primary power comes from the power line to be monitored which is an AC or DC power supply. The voltage Vdd is applied to the anode of the first diode 31. The first diode 31 is arranged to feed the management circuit 25. The cathode of the first diode 31 is here connected to the input of the third microcontroller 5. In a advantageous embodiment, the first diode 31 is also connected to a first terminal of a decoupling capacitor 32 configured to smooth the voltage applied by the power supplies. A second terminal of the decoupling capacitor 32 is connected to the reference potential 23, here to earth. The supply of the management circuit 25 by the primary source 2 saves the electric battery 13 which intervenes only in case of fault of the primary source 2. It is also the same for the other elements used to monitor the state of the battery 13 namely the measuring circuit 26, the counter 30 and the comparator 27. The anode of the battery 13 is connected to the source of the transistor 29. The management circuit 25 applies a voltage Vp01 on the gate of said transistor 29, which makes it possible to control the passage of a current from the battery 13 (FIG. 3b). In the illustrated example, the drain of transistor 29 is connected to the anode of a second diode 31 '. The cathode of the diode 31 'is connected to the input of the control circuit and here more precisely to the input of the third microcontroller. The electrical connection between the two diodes 31 and 31 'with the decoupling capacitor 32 defines a second node N2. By way of example, the transistor 29 is a P-type MOSFET. In an advantageous embodiment, the supply voltage Vdch provided by the primary power supply 2 is about 3.3V with a tolerance of more than or less than 5%. The battery voltage Vbat 13 is approximately 3.6V for a fully charged battery 13. In one embodiment, the decoupling capacitor 32 is a capacitor having a capacitance of the order of Cd = 1e.
    [0034] In a particular configuration, the first diode 31 and the second diode 31 'are Schottky or silicon diodes having a low direct voltage.
    [0035] In a particular operating mode illustrated in FIG. 3b, the discharge current passes through the third microcontroller 5. The electric charge 28 is connected between the third microcontroller 5 and the reference voltage 23. For example, a resistor An electric current of the order of 11 (5-2 can be used to form the electric charge 28. In this case, a discharge current Id of about 3 mA is advantageous for ensuring the degradation of the passivation layer. The discharge current is advantageously equal to 3 mA, which corresponds with the variations of embodiment to a current of between 2.7 and 3.3 mA.
    [0036] In this configuration, a first electrical node N1 is defined by the connection of the anode of the battery 13 with the terminal of the source of the transistor 29 and the supply input of the control circuit 4. The voltage Vbat of the battery 13 can be measured at the node N1 by the measuring means 26. A second electrical node N2 is defined by the connection of the cathode of the first diode 31 with the cathode of the second diode 31 'and the second input of the third microcontroller 5. A terminal of the decoupling capacitor 32 is also connected to the node N2. In operation, the monitoring device 1 can apply the protocol for monitoring the state of the battery 13 which will follow and illustrated in FIG. 4. The beginning of the process is represented by the step 40, the battery 13 is present and the monitoring device 1 is powered either by the battery 13 or by the primary power supply 2. Step 40 can be considered as a standby state.
    [0037] A measurement command is sent to initiate the measurement of the voltage Vbat at the terminals 13a of the battery 13. A discharge current Id is then advantageously applied to the battery 13 through the load 28 in order to break the passivation layer and the perform the load voltage measurements. At a step 41, the voltage Vbat across the battery 13 is measured by the measuring means 26. Preferably, the measurement of the voltage Vbat can be performed by multiple successive measurements, which makes it possible, for example, to calculate an average of the voltage Vbat, in order to obtain a more reliable value of Vbat. The discharge current Id is then interrupted. At a step 42-43, the measured voltage Vbat is compared with the first and second threshold values Vrnin and VOFF.
    [0038] In step 42, the measured voltage Vbat is compared with the first threshold value VOFF (Vbat <VOFF ). If the voltage Vbat is lower than the first threshold value VOFF (Vbat <VOFF), the battery 13 is considered faulty (step 44) and it is advantageous to replace it. Advantageously, the detection of the failed state is associated with the signaling of this state to the user (step 45).
    [0039] Following this signaling event, the management method may end with a waiting phase for the replacement of the battery 13. The signaling may be carried out, for example, with a advantageously discrete signal sent by the output 41 to a diode electroluminescent or a digital or analog signal sent to another member of the monitoring device. In a particular embodiment, the threshold value VoFF is equal for example to 2.3V. If the voltage Vbat, in step 42, is greater than the first threshold value VoFF (Vbat> VOFF), the measured voltage Vbat is compared with the second threshold value Vrnin. In step 43, the measured voltage Vbat is compared with the second threshold value Vrnin (Vbat> Vmin ). If the voltage Vbat is greater than the second threshold value Vmin (Vbat> Vmin), the battery 13 is considered functional. This information can be stored in memory. The management method then returns to a waiting state (step 40) or it resumes a step of measuring the voltage Vbat (step 41). Advantageously, the tracking method returns to the initial state 40 and it waits for a new measurement order in order to avoid overloading the battery 13. If the voltage Vbat is lower than the second threshold value Vrnin (Vbat < Vmin) this means that the voltage Vbat is in the voltage range between the first threshold value VoFF and the second threshold value Vinin. The battery 13 may have a problem that can be corrected. An additional test protocol for the battery 13 is engaged (step 46). A discharge current Id is again applied to the battery 13 through the load 28 to break the passivation layer. Advantageously, with the application of a discharge current Id, the counter 30 is incremented in order to know the number of occurrences of this type of problem (step 47).
    [0040] The counter is configured to record the number of iterations of the activation of the discharge current Id. As indicated above, the counter records a datum representative of the number of iterations (n). It is therefore possible to record a time, an electric charge, the number of iterations performed or another quantity.
    [0041] The incrementation of the counter (step 47) can be performed, before step 46, during step 46 or after step 46. After a certain duration of application of the discharge current Id, the voltage Vbat at the terminals of the battery 13 is measured again (step 41) in order to measure the evolution of the voltage Vbat. As before, the measured voltage Vbat is compared with the first and second voltage values (steps 42 and 43).
    [0042] If the voltage Vbat is greater than the second threshold value Vmin (Vbat> Vmin), the battery 13 is considered functional. This information can be stored in memory and it is advantageous to reset the counter 30.
    [0043] If the voltage Vbat is lower than the first threshold value (Vbat <V0FF), the battery 13 is considered to be faulty and it is advantageous to replace it. The protocol described above can be applied. If the voltage Vbat is in the voltage range between the first threshold value VOFF and the second threshold value Vmin, it is possible to generate again a discharge current Id. In order to avoid the repetition of the discharge current Id at the terminals of the battery 13 until the voltage Vbat is lower than the first threshold value VoFF, it is advantageous to introduce a step 48 for comparing the value recorded in the counter 30 with respect to a critical value Nc (n <Nc ). Here again the position of step 48 with respect to steps 46 and 47 is of little importance. Once the limit value Nc is reached, it is considered that the battery 13 can no longer be repaired and the battery is considered faulty (step 44). The failure protocol is advantageously applied to warn the user. Thus, if the measured voltage Vbat is between the first and second threshold values, it is advantageous to make a comparison of the value of the counter with respect to a critical value (step 48) in order to determine if the battery 13 is defective or if a discharge current can improve the situation. This is an additional criterion for detecting a faulty battery.
    [0044] Steps 42 and 43 can be inverted to the extent that it is possible to determine if the voltage Vbat is lower than the first threshold value VoFF, greater than the second threshold value Vmin or in the range indicated above.
    [0045] In an advantageous embodiment, the management protocol includes a repetition of certain steps periodically in order to follow the evolution of the state of the battery 13 over time. Advantageously, the measurement of the voltage Vbat at the terminals 13a of the battery 13 is carried out periodically. In an advantageous embodiment, the management protocol is triggered when a new battery 13 is connected to the monitoring device 1. In this way, the user quickly knows whether the new battery 13 is functional or faulty.
    [0046] It is also possible to force the measurement protocol, for example by means of an action by the user either by pressing a push button 33 or by soliciting a communication interface.
    [0047] In a particular operating mode, the measurement of the voltage Vbat, carried out during the step 41, can be described schematically in the manner shown in FIG. 5. In the embodiment illustrated in FIG. 5, the measurement of the voltage is carried out cyclically. The period is equal to the time Atm.
    [0048] If the battery 3 is considered functional, that is to say if the measured voltage is greater than the threshold Vmin, it is advantageous to carry out the voltage measurement according to a first period Atmt, for example equal to 24 hours. On the other hand, if the battery 13 is considered as potentially faulty, that is to say if the measured voltage is lower than the threshold Vm ,,, but higher than the threshold V0FF, it is advantageous to carry out the voltage measurement according to a second Atm2 period, for example equal to 19 minutes. Advantageously, when the voltage across the battery 13 is measured within the range defined by the voltages Vrnin and VOFF, a discharge current Id is applied and the voltage Vbat is measured after a predefined period of time. Waiting that follows the stop of the discharge current Id. During the period Atm2, a discharge phase with a current equal to Id is applied. This periodic discharge phase makes it possible to solicit the terminals of the battery to reduce the formation of a passivation layer. Preferably, the voltages are measured after a first waiting time Att, for example at least equal to 48 ms. This first waiting time corresponds to the time that separates the end of the application of the current Id and the first voltage measurement Vbat. The first waiting time makes the voltage measurement more reliable. It is also possible to measure the voltage Vbat when the current Id flows. Here again, it is advantageous to measure the steady-state voltage, for example after the first waiting time Ati. As indicated above, to obtain a more accurate measurement of the voltage Vbat across the battery, several voltage measurements are preferably performed. For example, three voltage measurements are made. These measurements are carried out at times t1, t2 and t3 in FIG. 5. The three measurements can be spaced from the same rest period or it is possible to apply a different rest period between the first and second measurements and between the second and third measures. In a mode of operation giving good results, a waiting time of at least 2ms is present between two successive voltage measurements. During the period Atm, there is a discharge phase where the current Id is applied and a rest phase. During the rest phase, a second current can be applied. The second current is lower than the first current Id. The second current is advantageously less than half the first current Id (in absolute value). It is also possible to have a second zero current during the rest phase. Alternatively, during the discharge phase, the discharge current Id is a periodic current with alternating periods of discharge at a first current and rest periods at a second current less than the first current (in absolute value) or current. no. For example, in FIG. 5, during the period Atm, there is a discharge phase with a current equal to Id from t0 to t3 and a rest phase with a current much less than Id of t3 at the end of the period. ATM.
    [0049] For example, good experimental results were obtained with a period At, equal to 19 seconds and a phase to t3, where the current is equal to Id, equal to 50 milliseconds for the monitoring of the voltage Vbat and the depassivation of the battery.
    [0050] By way of example, the evolution of the voltage across the battery is shown in FIG. 6. Until time A, the measured voltage Vbat lies between the voltages VoFF and Vmin. There is a doubt about the state of the battery which can be functional but passivated. Until moment A, a discharge current is applied from the battery 13.
    [0051] From moment A to moment B, voltage Vbat is greater than voltage VII * and battery 13 is considered functional. The measurement of the voltage Vbat is carried out periodically.
    [0052] From the moment B and up to the moment C, the voltage Vbat is between the voltage Vmin and the voltage VoFF. A discharge current is again applied. From the moment C, the voltage Vbat is lower than the voltage VOFF and the battery 13 is considered as faulty. Thus, there is provided an effective device, simple to implement, and particularly suitable for the state of a power supply battery 13 of a storage circuit 24.30
    权利要求:
    Claims (10)
    [0001]
    REVENDICATIONS1. A circuit breaker having a series of inputs for connection to a first microcontroller (3) configured to measure characteristics of an electric current of a supply line (2) for detecting an electrical fault in the supply line ( 2), a second microcontroller (4) powered by said power line and having a first power consumption value, the second microcontroller (4) being configured to analyze data from the first microcontroller (3) to detect an electrical fault. of the supply line (2), a third microcontroller (5) fed by said supply line and connected to receive data from the first and second microcontrollers (3, 4), the third microcontroller (5) being configured to signal the tripping cause of the circuit breaker (1), the third microcontroller (5) having a second consumption value elect lower than the first power consumption value, a secondary power source (13) configured to supply the third microcontroller (5) in case of unavailability of the power line (2).
    [0002]
    2. Circuit breaker according to claim 1, characterized in that the third microcontroller (5) is configured to exit from a standby state on receipt of a signal from the first and / or second microcontroller (3, 4). indicating the detection of the electrical fault of the supply line (2).
    [0003]
    3. Circuit breaker according to one of claims 1 and 2, characterized in that: - the first microcontroller (3) is connected to the second microcontroller (4) by means of a first communication line (9) having a buffer memory (18a separating the first and second microcontrollers (3,
    [0004]
    4), the second microcontroller (4) is connected to the third microcontroller (5) by means of a second communication line (9 ') having a buffer memory (18b) separating the second and third microcontrollers (4,
    [0005]
    5), the second microcontroller (4) outputs a synchronization signal to the third microcontroller (5) to set the read priority on said buffers (18, 18 '). Circuit breaker according to one of Claims 1 and 2, characterized in that the first microcontroller (3) is connected to the second microcontroller (4) by means of a first communication line (9) comprising a buffer memory (18a). , the first microcontroller (3) is connected to the third microcontroller (5) by means of a second connection line (9 ') shunted by the first communication line (9), the second connection line (9') with a second buffer memory (18b), a synchronization signal is emitted by the second microcontroller (3) to the third microcontroller (4) to set the read priority on the buffer memories (18a, 18b). 5. Circuit breaker according to any one of claims 1 to 3, characterized in that the second and third microcontrollers (4, 5) are connected to a first memory (10) and in that a synchronization signal is emitted by the second microcontroller (3) to the third microcontroller (5) for setting the read priority on the memory (10).
    [0006]
    Circuit breaker according to Claim 4, characterized in that the memory (10) is of the electrically erasable and programmable permanent memory type or of the magnetic permanent permanent memory type and has a secondary power supply formed by a capacitor.
    [0007]
    7. Circuit breaker according to claims 2 and 5, characterized in that the third microcontroller (5) is configured to exit the standby state failing to receive a synchronization signal.
    [0008]
    8. Circuit breaker according to any one of claims 1 to 6, characterized in that the second and / or third microcontrollers (4, 5) are connected to a second memory (19), the second memory (19) being connected to means of communication in the near field.
    [0009]
    9. Circuit breaker according to any one of claims 1 to 7, characterized in that the second microcontroller (4) and the first microcontroller (3) each have a secondary power supply formed by a capacitor (8, 8 ').
    [0010]
    10. Circuit breaker according to any one of claims 1 to 7, characterized in that it comprises the first microcontroller (3) powered by means of said feed line (2).
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    同族专利:
    公开号 | 公开日
    EP2924837A1|2015-09-30|
    RU2015109320A3|2018-11-06|
    RU2015109320A|2016-10-10|
    FR3018961B1|2016-04-01|
    US20150270083A1|2015-09-24|
    US9490091B2|2016-11-08|
    BR102015005818A2|2015-12-15|
    ES2734674T3|2019-12-11|
    RU2676334C2|2018-12-28|
    CN104953533B|2018-12-14|
    EP2924837B1|2019-05-01|
    CN104953533A|2015-09-30|
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    法律状态:
    2015-03-11| PLFP| Fee payment|Year of fee payment: 2 |
    2016-03-08| PLFP| Fee payment|Year of fee payment: 3 |
    2017-03-14| PLFP| Fee payment|Year of fee payment: 4 |
    2018-03-14| PLFP| Fee payment|Year of fee payment: 5 |
    2019-03-20| PLFP| Fee payment|Year of fee payment: 6 |
    2020-12-18| ST| Notification of lapse|Effective date: 20201110 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1400710A|FR3018961B1|2014-03-24|2014-03-24|DEVICE FOR MANAGING TRIGGER CAUSES IN AN ELECTRONIC TRIGGER|FR1400710A| FR3018961B1|2014-03-24|2014-03-24|DEVICE FOR MANAGING TRIGGER CAUSES IN AN ELECTRONIC TRIGGER|
    RU2015109320A| RU2676334C2|2014-03-24|2015-03-17|Device for controlling decoupling causes for electronic decoupling device|
    BR102015005818A| BR102015005818A2|2014-03-24|2015-03-17|trigger cause management device for electronic trigger device|
    US14/665,387| US9490091B2|2014-03-24|2015-03-23|Trip cause management device for an electronic trip device|
    CN201510131779.5A| CN104953533B|2014-03-24|2015-03-24|Trip reason management equipment for electronic trip device|
    ES15160614T| ES2734674T3|2014-03-24|2015-03-24|Device for managing the causes of triggering in an electronic trigger|
    EP15160614.2A| EP2924837B1|2014-03-24|2015-03-24|Trip cause management device for an electric trip device|
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